Enum xed_sys::xed_interface::xed_reg_enum_t

#[repr(u32)]
pub enum xed_reg_enum_t {
    XED_REG_INVALID,
    XED_REG_BNDCFGU,
    XED_REG_BNDSTATUS,
    XED_REG_BND0,
    XED_REG_BND1,
    XED_REG_BND2,
    XED_REG_BND3,
    XED_REG_CR0,
    XED_REG_CR1,
    XED_REG_CR2,
    XED_REG_CR3,
    XED_REG_CR4,
    XED_REG_CR5,
    XED_REG_CR6,
    XED_REG_CR7,
    XED_REG_CR8,
    XED_REG_CR9,
    XED_REG_CR10,
    XED_REG_CR11,
    XED_REG_CR12,
    XED_REG_CR13,
    XED_REG_CR14,
    XED_REG_CR15,
    XED_REG_DR0,
    XED_REG_DR1,
    XED_REG_DR2,
    XED_REG_DR3,
    XED_REG_DR4,
    XED_REG_DR5,
    XED_REG_DR6,
    XED_REG_DR7,
    XED_REG_DR8,
    XED_REG_DR9,
    XED_REG_DR10,
    XED_REG_DR11,
    XED_REG_DR12,
    XED_REG_DR13,
    XED_REG_DR14,
    XED_REG_DR15,
    XED_REG_FLAGS,
    XED_REG_EFLAGS,
    XED_REG_RFLAGS,
    XED_REG_AX,
    XED_REG_CX,
    XED_REG_DX,
    XED_REG_BX,
    XED_REG_SP,
    XED_REG_BP,
    XED_REG_SI,
    XED_REG_DI,
    XED_REG_R8W,
    XED_REG_R9W,
    XED_REG_R10W,
    XED_REG_R11W,
    XED_REG_R12W,
    XED_REG_R13W,
    XED_REG_R14W,
    XED_REG_R15W,
    XED_REG_EAX,
    XED_REG_ECX,
    XED_REG_EDX,
    XED_REG_EBX,
    XED_REG_ESP,
    XED_REG_EBP,
    XED_REG_ESI,
    XED_REG_EDI,
    XED_REG_R8D,
    XED_REG_R9D,
    XED_REG_R10D,
    XED_REG_R11D,
    XED_REG_R12D,
    XED_REG_R13D,
    XED_REG_R14D,
    XED_REG_R15D,
    XED_REG_RAX,
    XED_REG_RCX,
    XED_REG_RDX,
    XED_REG_RBX,
    XED_REG_RSP,
    XED_REG_RBP,
    XED_REG_RSI,
    XED_REG_RDI,
    XED_REG_R8,
    XED_REG_R9,
    XED_REG_R10,
    XED_REG_R11,
    XED_REG_R12,
    XED_REG_R13,
    XED_REG_R14,
    XED_REG_R15,
    XED_REG_AL,
    XED_REG_CL,
    XED_REG_DL,
    XED_REG_BL,
    XED_REG_SPL,
    XED_REG_BPL,
    XED_REG_SIL,
    XED_REG_DIL,
    XED_REG_R8B,
    XED_REG_R9B,
    XED_REG_R10B,
    XED_REG_R11B,
    XED_REG_R12B,
    XED_REG_R13B,
    XED_REG_R14B,
    XED_REG_R15B,
    XED_REG_AH,
    XED_REG_CH,
    XED_REG_DH,
    XED_REG_BH,
    XED_REG_ERROR,
    XED_REG_RIP,
    XED_REG_EIP,
    XED_REG_IP,
    XED_REG_K0,
    XED_REG_K1,
    XED_REG_K2,
    XED_REG_K3,
    XED_REG_K4,
    XED_REG_K5,
    XED_REG_K6,
    XED_REG_K7,
    XED_REG_MMX0,
    XED_REG_MMX1,
    XED_REG_MMX2,
    XED_REG_MMX3,
    XED_REG_MMX4,
    XED_REG_MMX5,
    XED_REG_MMX6,
    XED_REG_MMX7,
    XED_REG_SSP,
    XED_REG_IA32_U_CET,
    XED_REG_MXCSR,
    XED_REG_STACKPUSH,
    XED_REG_STACKPOP,
    XED_REG_GDTR,
    XED_REG_LDTR,
    XED_REG_IDTR,
    XED_REG_TR,
    XED_REG_TSC,
    XED_REG_TSCAUX,
    XED_REG_MSRS,
    XED_REG_FSBASE,
    XED_REG_GSBASE,
    XED_REG_X87CONTROL,
    XED_REG_X87STATUS,
    XED_REG_X87TAG,
    XED_REG_X87PUSH,
    XED_REG_X87POP,
    XED_REG_X87POP2,
    XED_REG_X87OPCODE,
    XED_REG_X87LASTCS,
    XED_REG_X87LASTIP,
    XED_REG_X87LASTDS,
    XED_REG_X87LASTDP,
    XED_REG_CS,
    XED_REG_DS,
    XED_REG_ES,
    XED_REG_SS,
    XED_REG_FS,
    XED_REG_GS,
    XED_REG_TMP0,
    XED_REG_TMP1,
    XED_REG_TMP2,
    XED_REG_TMP3,
    XED_REG_TMP4,
    XED_REG_TMP5,
    XED_REG_TMP6,
    XED_REG_TMP7,
    XED_REG_TMP8,
    XED_REG_TMP9,
    XED_REG_TMP10,
    XED_REG_TMP11,
    XED_REG_TMP12,
    XED_REG_TMP13,
    XED_REG_TMP14,
    XED_REG_TMP15,
    XED_REG_ST0,
    XED_REG_ST1,
    XED_REG_ST2,
    XED_REG_ST3,
    XED_REG_ST4,
    XED_REG_ST5,
    XED_REG_ST6,
    XED_REG_ST7,
    XED_REG_XCR0,
    XED_REG_XMM0,
    XED_REG_XMM1,
    XED_REG_XMM2,
    XED_REG_XMM3,
    XED_REG_XMM4,
    XED_REG_XMM5,
    XED_REG_XMM6,
    XED_REG_XMM7,
    XED_REG_XMM8,
    XED_REG_XMM9,
    XED_REG_XMM10,
    XED_REG_XMM11,
    XED_REG_XMM12,
    XED_REG_XMM13,
    XED_REG_XMM14,
    XED_REG_XMM15,
    XED_REG_XMM16,
    XED_REG_XMM17,
    XED_REG_XMM18,
    XED_REG_XMM19,
    XED_REG_XMM20,
    XED_REG_XMM21,
    XED_REG_XMM22,
    XED_REG_XMM23,
    XED_REG_XMM24,
    XED_REG_XMM25,
    XED_REG_XMM26,
    XED_REG_XMM27,
    XED_REG_XMM28,
    XED_REG_XMM29,
    XED_REG_XMM30,
    XED_REG_XMM31,
    XED_REG_YMM0,
    XED_REG_YMM1,
    XED_REG_YMM2,
    XED_REG_YMM3,
    XED_REG_YMM4,
    XED_REG_YMM5,
    XED_REG_YMM6,
    XED_REG_YMM7,
    XED_REG_YMM8,
    XED_REG_YMM9,
    XED_REG_YMM10,
    XED_REG_YMM11,
    XED_REG_YMM12,
    XED_REG_YMM13,
    XED_REG_YMM14,
    XED_REG_YMM15,
    XED_REG_YMM16,
    XED_REG_YMM17,
    XED_REG_YMM18,
    XED_REG_YMM19,
    XED_REG_YMM20,
    XED_REG_YMM21,
    XED_REG_YMM22,
    XED_REG_YMM23,
    XED_REG_YMM24,
    XED_REG_YMM25,
    XED_REG_YMM26,
    XED_REG_YMM27,
    XED_REG_YMM28,
    XED_REG_YMM29,
    XED_REG_YMM30,
    XED_REG_YMM31,
    XED_REG_ZMM0,
    XED_REG_ZMM1,
    XED_REG_ZMM2,
    XED_REG_ZMM3,
    XED_REG_ZMM4,
    XED_REG_ZMM5,
    XED_REG_ZMM6,
    XED_REG_ZMM7,
    XED_REG_ZMM8,
    XED_REG_ZMM9,
    XED_REG_ZMM10,
    XED_REG_ZMM11,
    XED_REG_ZMM12,
    XED_REG_ZMM13,
    XED_REG_ZMM14,
    XED_REG_ZMM15,
    XED_REG_ZMM16,
    XED_REG_ZMM17,
    XED_REG_ZMM18,
    XED_REG_ZMM19,
    XED_REG_ZMM20,
    XED_REG_ZMM21,
    XED_REG_ZMM22,
    XED_REG_ZMM23,
    XED_REG_ZMM24,
    XED_REG_ZMM25,
    XED_REG_ZMM26,
    XED_REG_ZMM27,
    XED_REG_ZMM28,
    XED_REG_ZMM29,
    XED_REG_ZMM30,
    XED_REG_ZMM31,
    XED_REG_LAST,
}

Variants

XED_REG_INVALIDXED_REG_BNDCFGUXED_REG_BNDSTATUSXED_REG_BND0XED_REG_BND1XED_REG_BND2XED_REG_BND3XED_REG_CR0XED_REG_CR1XED_REG_CR2XED_REG_CR3XED_REG_CR4XED_REG_CR5XED_REG_CR6XED_REG_CR7XED_REG_CR8XED_REG_CR9XED_REG_CR10XED_REG_CR11XED_REG_CR12XED_REG_CR13XED_REG_CR14XED_REG_CR15XED_REG_DR0XED_REG_DR1XED_REG_DR2XED_REG_DR3XED_REG_DR4XED_REG_DR5XED_REG_DR6XED_REG_DR7XED_REG_DR8XED_REG_DR9XED_REG_DR10XED_REG_DR11XED_REG_DR12XED_REG_DR13XED_REG_DR14XED_REG_DR15XED_REG_FLAGSXED_REG_EFLAGSXED_REG_RFLAGSXED_REG_AXXED_REG_CXXED_REG_DXXED_REG_BXXED_REG_SPXED_REG_BPXED_REG_SIXED_REG_DIXED_REG_R8WXED_REG_R9WXED_REG_R10WXED_REG_R11WXED_REG_R12WXED_REG_R13WXED_REG_R14WXED_REG_R15WXED_REG_EAXXED_REG_ECXXED_REG_EDXXED_REG_EBXXED_REG_ESPXED_REG_EBPXED_REG_ESIXED_REG_EDIXED_REG_R8DXED_REG_R9DXED_REG_R10DXED_REG_R11DXED_REG_R12DXED_REG_R13DXED_REG_R14DXED_REG_R15DXED_REG_RAXXED_REG_RCXXED_REG_RDXXED_REG_RBXXED_REG_RSPXED_REG_RBPXED_REG_RSIXED_REG_RDIXED_REG_R8XED_REG_R9XED_REG_R10XED_REG_R11XED_REG_R12XED_REG_R13XED_REG_R14XED_REG_R15XED_REG_ALXED_REG_CLXED_REG_DLXED_REG_BLXED_REG_SPLXED_REG_BPLXED_REG_SILXED_REG_DILXED_REG_R8BXED_REG_R9BXED_REG_R10BXED_REG_R11BXED_REG_R12BXED_REG_R13BXED_REG_R14BXED_REG_R15BXED_REG_AHXED_REG_CHXED_REG_DHXED_REG_BHXED_REG_ERRORXED_REG_RIPXED_REG_EIPXED_REG_IPXED_REG_K0XED_REG_K1XED_REG_K2XED_REG_K3XED_REG_K4XED_REG_K5XED_REG_K6XED_REG_K7XED_REG_MMX0XED_REG_MMX1XED_REG_MMX2XED_REG_MMX3XED_REG_MMX4XED_REG_MMX5XED_REG_MMX6XED_REG_MMX7XED_REG_SSPXED_REG_IA32_U_CETXED_REG_MXCSRXED_REG_STACKPUSHXED_REG_STACKPOPXED_REG_GDTRXED_REG_LDTRXED_REG_IDTRXED_REG_TRXED_REG_TSCXED_REG_TSCAUXXED_REG_MSRSXED_REG_FSBASEXED_REG_GSBASEXED_REG_X87CONTROLXED_REG_X87STATUSXED_REG_X87TAGXED_REG_X87PUSHXED_REG_X87POPXED_REG_X87POP2XED_REG_X87OPCODEXED_REG_X87LASTCSXED_REG_X87LASTIPXED_REG_X87LASTDSXED_REG_X87LASTDPXED_REG_CSXED_REG_DSXED_REG_ESXED_REG_SSXED_REG_FSXED_REG_GSXED_REG_TMP0XED_REG_TMP1XED_REG_TMP2XED_REG_TMP3XED_REG_TMP4XED_REG_TMP5XED_REG_TMP6XED_REG_TMP7XED_REG_TMP8XED_REG_TMP9XED_REG_TMP10XED_REG_TMP11XED_REG_TMP12XED_REG_TMP13XED_REG_TMP14XED_REG_TMP15XED_REG_ST0XED_REG_ST1XED_REG_ST2XED_REG_ST3XED_REG_ST4XED_REG_ST5XED_REG_ST6XED_REG_ST7XED_REG_XCR0XED_REG_XMM0XED_REG_XMM1XED_REG_XMM2XED_REG_XMM3XED_REG_XMM4XED_REG_XMM5XED_REG_XMM6XED_REG_XMM7XED_REG_XMM8XED_REG_XMM9XED_REG_XMM10XED_REG_XMM11XED_REG_XMM12XED_REG_XMM13XED_REG_XMM14XED_REG_XMM15XED_REG_XMM16XED_REG_XMM17XED_REG_XMM18XED_REG_XMM19XED_REG_XMM20XED_REG_XMM21XED_REG_XMM22XED_REG_XMM23XED_REG_XMM24XED_REG_XMM25XED_REG_XMM26XED_REG_XMM27XED_REG_XMM28XED_REG_XMM29XED_REG_XMM30XED_REG_XMM31XED_REG_YMM0XED_REG_YMM1XED_REG_YMM2XED_REG_YMM3XED_REG_YMM4XED_REG_YMM5XED_REG_YMM6XED_REG_YMM7XED_REG_YMM8XED_REG_YMM9XED_REG_YMM10XED_REG_YMM11XED_REG_YMM12XED_REG_YMM13XED_REG_YMM14XED_REG_YMM15XED_REG_YMM16XED_REG_YMM17XED_REG_YMM18XED_REG_YMM19XED_REG_YMM20XED_REG_YMM21XED_REG_YMM22XED_REG_YMM23XED_REG_YMM24XED_REG_YMM25XED_REG_YMM26XED_REG_YMM27XED_REG_YMM28XED_REG_YMM29XED_REG_YMM30XED_REG_YMM31XED_REG_ZMM0XED_REG_ZMM1XED_REG_ZMM2XED_REG_ZMM3XED_REG_ZMM4XED_REG_ZMM5XED_REG_ZMM6XED_REG_ZMM7XED_REG_ZMM8XED_REG_ZMM9XED_REG_ZMM10XED_REG_ZMM11XED_REG_ZMM12XED_REG_ZMM13XED_REG_ZMM14XED_REG_ZMM15XED_REG_ZMM16XED_REG_ZMM17XED_REG_ZMM18XED_REG_ZMM19XED_REG_ZMM20XED_REG_ZMM21XED_REG_ZMM22XED_REG_ZMM23XED_REG_ZMM24XED_REG_ZMM25XED_REG_ZMM26XED_REG_ZMM27XED_REG_ZMM28XED_REG_ZMM29XED_REG_ZMM30XED_REG_ZMM31XED_REG_LAST

Trait Implementations

impl Debug for xed_reg_enum_t

fn fmt(&self, __arg_0: &mut Formatter) -> Result

Formats the value using the given formatter.

impl Copy for xed_reg_enum_t

impl Clone for xed_reg_enum_t

fn clone(&self) -> xed_reg_enum_t

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl PartialEq for xed_reg_enum_t

fn eq(&self, __arg_0: &xed_reg_enum_t) -> bool

This method tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

This method tests for !=.

impl Eq for xed_reg_enum_t

impl Hash for xed_reg_enum_t

fn hash<__H: Hasher>(&self, __arg_0: &mut __H)

Feeds this value into the given [Hasher].

fn hash_slice<H>(data: &[Self], state: &mut H) where
    H: Hasher, 

Feeds a slice of this type into the given [Hasher].